JEE Mains Physics · Formula sheet

Semiconductor Electronics formulas

10 formulas, 4 reference tables and 49 common traps for JEE Mains Physics Semiconductor Electronics, grouped by subtopic.

Full notes with worked examples

Semiconductors and the p-n Junction

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The p-n junction: barrier, bias and dynamic resistance

Barrier field, energy loss and dynamic resistance

E = \frac{V_b}{d}, \qquad \tfrac{1}{2}mv^{2} = \tfrac{1}{2}mu^{2} - eV_b, \qquad r = \frac{\Delta V}{\Delta I}

Intrinsic, n-type and p-type semiconductors

Type	Dopant	Majority carriers	Fermi level	Net charge
Intrinsic (pure Si, Ge)	none	none: $n_e = n_h = n_i$	near the middle of the band gap	neutral
n-type	pentavalent donor: P, As, Sb	electrons	near the conduction band; rises with more doping	neutral
p-type	trivalent acceptor: B, Al, Ga, In	holes	near the valence band; falls with more doping	neutral
Metal	not doped	free electrons	inside the conduction band	neutral

Whatever the dopant, the crystal stays neutral and the product of the two carrier densities stays fixed.

Special-purpose diodes and the bias each one uses

Device	Bias in use	Doping and junction	What it does
Rectifier diode	forward to conduct, reverse to block	moderate doping	lets current through one way only
Zener diode	reverse, at breakdown	both sides heavily doped; thin depletion layer	holds the voltage across it constant
LED	forward	heavily doped	electrons and holes recombine and give out light of photon energy about $E_g$
Photodiode	reverse	junction close to the surface so light reaches it	light makes electron-hole pairs and raises the reverse current
Solar cell	no external bias	large junction area, thin top layer	light produces an emf; works in the fourth quadrant of the I-V graph

The LED is the only one forward biased in use; the photodiode and Zener work in reverse, and the solar cell needs no battery at all.

Common traps

Extra electrons do not make a negative crystal

An n-type crystal has more free electrons than holes, but every donor atom that gave an electron is left as a positive ion. The crystal as a whole is neutral. 'n-type has net negative charge' is false.

The product stays fixed, not the sum

Doping raises one carrier density and lowers the other so that n_e n_h = n_i² still holds. The minority density falls below n_i; it does not stay at n_i.

Resistivity falls with heat, but never to zero

A graph of a semiconductor's resistivity against temperature is a falling curve that flattens out. A straight line, a rising curve or one that touches zero is wrong.

Compare potentials, not signs

A diode is forward biased when its p-side is at the higher potential. p at −4 V and n at −9 V is forward biased even though both are negative; p at −4 V and n at 0 V is reverse biased.

No battery, no current

Joining p-type to n-type does not make a current flow round an external ammeter. Diffusion builds the barrier until the diffusion and drift currents cancel, and the ammeter reads zero.

The wider layer is on the lightly doped side

The charge uncovered on each side must be equal, so the side with fewer dopant atoms per volume must uncover a longer stretch. The heavily doped side has the thinner part of the depletion layer.

Subtract energy, then take the root

An electron crossing the barrier loses eV_b of kinetic energy, not a fixed amount of speed. Subtract in energy, then convert back to speed with a square root.

A photodiode is reverse biased

Forward biased, a photodiode carries a large majority current that light hardly changes. It is used in reverse bias, where light changes the small minority current by a large fraction.

Use eV with 1240, or joules with hc

λ in nm = 1240 ÷ E in eV. Dividing 1240 by an energy in joules, or hc in joule metres by an energy in eV, gives an answer off by a factor of about 10¹⁹.

A solar cell needs a large area

A solar cell's junction area is made large to collect as much light as possible, and it has no battery. A photodiode has the small junction and the reverse bias.

Diode Circuits and Rectifiers

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Ideal diodes in resistor networks

A diode as a switch

\text{forward: } R_D = r_f\ \ (0 \text{ if ideal}), \qquad \text{reverse: } R_D \to \infty

Diodes with a fixed forward voltage drop

Current with fixed diode drops

I = \frac{V - \sum V_D}{\sum R}, \qquad V_{\text{LED}} = \frac{P}{I}, \qquad R_S = \frac{V - V_{\text{LED}}}{I}

Rectifiers, filters and clipping

Output frequency and peak

f_{\text{out}} = f\ (\text{half-wave}), \quad 2f\ (\text{full-wave}); \qquad V_{\text{peak}} = V_m - V_D\ \text{per conducting diode}

Common traps

A blocked branch is gone, resistor and all

A reverse-biased ideal diode carries no current, so the resistor in series with it carries none either. Leaving that resistor in the parallel combination gives a wrong, smaller resistance.

Read the battery before the diodes

The long plate is positive. Reading the battery the wrong way round flips every diode's state at once and gives an answer that is usually among the options.

Forward resistance goes in series

When a diode has a forward resistance r_f, add it to the resistor in its own branch before combining branches. It is not a separate parallel path.

Subtract every conducting diode's drop

Two diodes in series take two drops out of the supply. Subtracting only one, or none, gives a current that is too large.

Germanium and silicon differ

Silicon drops about 0.7 V and germanium about 0.3 V. A circuit with one of each loses 1.0 V, not 1.4 V or 0.6 V.

Below cut-in there is no current

A drop is not a resistance. If the supply is smaller than the cut-in voltage, the diode is off and the current is zero, not a small value from Ohm's law.

Capacitor across, inductor in series

Both smooth the output, but in different places. A capacitor goes in parallel with the load; an inductor goes in series with it. A capacitor in series would block the dc altogether.

Full-wave doubles the frequency

A full-wave rectifier gives two pulses per input cycle, so its ripple is at 2f, 100 Hz on 50 Hz mains. The half-wave output repeats at f.

A reversed diode passes the other half

Turning the diode round in a half-wave rectifier gives negative half-sines across the load, not positive ones. Check the diode's direction before choosing a waveform.

Zener Diode as a Voltage Regulator

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Currents in a Zener regulator

Regulator currents

I_s = \frac{V_{in} - V_Z}{R_s}, \quad I_L = \frac{V_Z}{R_L}, \quad I_Z = I_s - I_L, \quad P_Z = V_Z I_Z

Choosing the series resistor for a Zener

Safe series resistor

I_{Z,\max} = \frac{P_{\max}}{V_Z}, \qquad R_{s,\min} = \frac{V_{in,\max} - V_Z}{I_{Z,\max}}

Common traps

Check breakdown before using V_Z

If the divider voltage across the load is below V_Z, the Zener is off and the load voltage is not V_Z. Assuming breakdown without checking gives a negative or wrong Zener current.

The Zener current is not the series current

The current through the series resistor splits between the load and the Zener. The Zener carries I_s − I_L; it carries all of I_s only when the load is removed.

Load current comes from V_Z, not the supply

In breakdown the load has V_Z across it, so I_L = V_Z ÷ R_L. Dividing the supply voltage by R_L overstates it.

Divide the power by V_Z

The Zener's own voltage is V_Z, so its largest current is P ÷ V_Z. Dividing the power by the supply voltage gives a current that is too small and a resistor that is too large.

Design for the highest input

The current, and so the heating, is largest at the highest input. Using the lowest input voltage gives a resistor that lets the Zener burn out when the supply rises.

No load is the worst case

With the load disconnected, the whole series current goes through the Zener. The safe resistor is found for that case unless the question fixes the load.

Transistors and the CE Amplifier

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Transistor structure, α and β

Transistor currents

I_E = I_B + I_C, \qquad \alpha = \frac{\beta}{1 + \beta}, \qquad \beta = \frac{\alpha}{1 - \alpha}

Gains of a common-emitter amplifier

Common-emitter gains

\beta = \frac{\Delta I_C}{\Delta I_B}, \quad r_i = \frac{\Delta V_{BE}}{\Delta I_B}, \quad A_V = \beta\,\frac{R_L}{r_i}, \quad A_P = \beta A_V

Common traps

α is below 1, β is large

α compares the collector current with the larger emitter current, so it is just under 1. β compares it with the small base current, so it is tens or hundreds. A relation that gives α above 1 has the two swapped.

The emitter current is the sum

I_E = I_B + I_C. From a change in emitter and collector current, the base change is their difference, and β is the collector change divided by that difference.

A switch uses cut-off and saturation

The active region is for amplifying. A transistor used as a switch is driven between cut-off (off) and saturation (on).

mA over μA is a factor of a thousand

β from a 3 mA change against a 25 μA change is 120, not 0.12. Convert both to the same unit before dividing.

Power gain has β twice

Power gain is current gain times voltage gain, β × A_V = β² R_L ÷ r_i. Using β once gives the voltage gain again.

Use the input resistance, not the base resistor

The voltage gain uses r_i, the transistor's own input resistance. When the question gives a separate input resistance, use it rather than the base resistor R_B; R_B stands in for r_i only when nothing else on the input side is given.

Logic Gates: Reducing a Network to One Gate

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NAND and NOR as universal gates

De Morgan's laws

\overline{A\cdot B} = \overline{A} + \overline{B}, \qquad \overline{A + B} = \overline{A}\cdot\overline{B}

Reducing a gate network with Boolean algebra

Simplifying rules

A + AB = A, \quad A(A + B) = A, \quad A + \overline{A}B = A + B, \quad A \oplus B = A\overline{B} + \overline{A}B

Logic gates built from diodes, transistors and switches

Circuit	Output is high when	Gate
Two diodes with anodes at the inputs; output across a resistor to earth	either input is high	OR
Two diodes with cathodes at the inputs; output pulled up to the supply through a resistor	both inputs are high	AND
Transistor in common emitter; input at the base, output at the collector	the input is low	NOT
Diode AND feeding a transistor inverter	at least one input is low	NAND
Diode OR feeding a transistor inverter	both inputs are low	NOR
Two switches in series with a lamp	both switches are closed	AND
Two switches in parallel, together in series with a lamp	either switch is closed	OR
Two switches in parallel across the lamp, shorting it when closed	both switches are open	NOR
Two switches in series across the lamp, shorting it when both are closed	at least one switch is open	NAND

The diodes' direction separates AND from OR; a transistor or a shorting switch adds the NOT.

Common traps

A tied-input NAND is a NOT

A two-input gate drawn with its inputs joined has only one input. A NAND or NOR wired that way is an inverter, not a two-input gate, and missing this makes the whole chain come out wrong.

De Morgan flips the operation and every bar

Breaking a long bar changes AND into OR (or OR into AND) and puts a bar on each term. Changing only one of the two gives a wrong gate.

Look for bubbles on the inputs

A bubble where a wire enters a gate inverts that input before the gate acts. Reading such a gate as plain AND or OR gives the wrong expression from the first step.

AB already implies A + B

Whenever AB is 1, A + B is 1 as well. So AB·(A + B) is just AB, and AB + (A + B) is just A + B. Missing this leaves an expression that looks like no gate at all.

A constant answer is allowed

Some networks combine a signal with its own inverse, as in A·Ā or A + Ā. The output is then 0 or 1 for every input, and an option such as 'Y = 0' is the right one.

XOR and XNOR are complements

XOR is 1 when the inputs differ; XNOR is 1 when they match. An extra inverter at the end swaps one for the other, so count the bubbles.

The diodes' direction decides AND or OR

Anodes at the inputs with the output pulled down make OR; cathodes at the inputs with the output pulled up make AND. Check which end of each diode faces the input before naming the gate.

A transistor stage inverts

Taking the output from the collector of a common-emitter transistor turns the diode gate before it into its inverse: AND becomes NAND, OR becomes NOR.

Switches across the lamp invert

Switches in line with a lamp light it when closed. Switches placed across the lamp short it out when closed, so the lamp is lit only when they are open: the gate is inverted.

Logic Gates: Truth Tables, Waveforms and Input Conditions

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Truth tables of the basic gates

Gate	Output Y	Y for (0,0), (0,1), (1,0), (1,1)	Y is 1 when
AND	$A\cdot B$	0, 0, 0, 1	both inputs are 1
OR	$A + B$	0, 1, 1, 1	at least one input is 1
NOT	$\overline{A}$	1 for A = 0; 0 for A = 1	the input is 0
NAND	$\overline{A\cdot B}$	1, 1, 1, 0	at least one input is 0
NOR	$\overline{A + B}$	1, 0, 0, 0	both inputs are 0
XOR	$A\overline{B} + \overline{A}B$	0, 1, 1, 0	the inputs differ
XNOR	$AB + \overline{A}\,\overline{B}$	1, 0, 0, 1	the inputs are equal

The row that differs from the other three identifies each two-input gate.

Common traps

Check the row order

Options often list the inputs as (0,0), (0,1), (1,1), (1,0). Matching outputs against the order you wrote, rather than the order printed, picks a wrong table that looks right.

One row fits several gates

An output of 1 for (0,0) is true of NAND, NOR and XNOR. Use a second row, such as (0,1), to tell them apart.

Invert the right input

A NOT gate on one input changes only that input. Writing Ā where the circuit inverts B gives the mirror-image table, which is usually an option.

Trace every wire from each input

An input wire can branch and feed a gate further along as well as the first gate. Missing that branch gives an expression with a variable left out and the wrong set of inputs.

An LED between two outputs needs a difference

If both ends of an LED are at logic 1, or both at 0, no current flows and it stays dark. It glows only when its anode side is 1 and its cathode side is 0.

Do not over-constrain a free input

If an input drops out of the simplified expression, any value of it works. An option is not wrong just because that input is 0 rather than 1.

Mark the edges of both inputs

Splitting time only where A changes misses the intervals where B alone switches. Every edge of either input starts a new interval.

Reduce first, then read the waveforms

Working gate by gate through every interval invites slips. Reduce the network to one gate first; a chain of tied NANDs into a NAND, for example, is just OR.

Name the gate from all the intervals

When the question gives the output waveform and asks for the gate, collect every (A, B, Y) triple. Two intervals can fit more than one gate; four rows fix it.

Semiconductor Electronics formulas

Semiconductors and the p-n Junction

The p-n junction: barrier, bias and dynamic resistance

Intrinsic, n-type and p-type semiconductors

Special-purpose diodes and the bias each one uses

Common traps

Diode Circuits and Rectifiers

Ideal diodes in resistor networks

Diodes with a fixed forward voltage drop

Rectifiers, filters and clipping

Common traps

Zener Diode as a Voltage Regulator

Currents in a Zener regulator

Choosing the series resistor for a Zener

Common traps

Transistors and the CE Amplifier

Transistor structure, α and β

Gains of a common-emitter amplifier

Common traps

Logic Gates: Reducing a Network to One Gate

NAND and NOR as universal gates

Reducing a gate network with Boolean algebra

Logic gates built from diodes, transistors and switches

Common traps

Logic Gates: Truth Tables, Waveforms and Input Conditions

Truth tables of the basic gates

Common traps

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