JEE Mains Physics · Semiconductor Electronics
Logic Gates: Reducing a Network to One Gate
Write each gate's output in turn, from the inputs to Y, and simplify with De Morgan's laws until one basic gate, or a constant, is left.
Why this matters
Twenty-five PYQs, all but one multiple choice, and two from 2026. Nine are chains of NAND or NOR gates, often with tied inputs, that turn out to be a single AND, OR, NAND or NOR. Ten are mixed networks that need a line or two of Boolean algebra, and two of those reduce to a constant output. Six build gates from diodes, transistors or switches; none of those six is newer than 2023. Almost every question is a drawn circuit, so reading the symbols and the bubbles correctly is half the work.
Concept 1 of 3: NAND and NOR as universal gates
Definition
- Notation: is AND, is OR, is NOT A.
- AND is 1 only when every input is 1. OR is 0 only when every input is 0. NAND and NOR are AND and OR followed by NOT.
- A small circle (bubble) on a gate's output inverts the output; a bubble on an input inverts that input.
- Tied inputs: NAND and NOR, both NOT gates. AND or OR with tied inputs just passes A on.
- De Morgan: and .
- So a NAND fed with and is an OR gate, and a NOR fed with and is an AND gate. One more tied-input gate after either inverts it again.
- Gate counts from NAND alone: NOT 1, AND 2, OR 3.
De Morgan's laws
Worked example
Practice this conceptself-check · 4 quick reps
The same idea in a real exam question:
Example 1 · Semiconductor Electronics · Logic Gates: Reducing a Network to One Gate
A tied-input NAND is a NOT
De Morgan flips the operation and every bar
Look for bubbles on the inputs
Concept 2 of 3: Reducing a gate network with Boolean algebra
Definition
- Write each gate's output as an expression, working from the inputs towards Y.
- Basic rules: , , , , , .
- Absorption: and . If AB is 1 then A + B is 1 too, so .
- .
- XOR: , which is 1 when the inputs differ. XNOR is its complement, 1 when they are equal.
- A network can reduce to a constant: then Y is 0 (or 1) for every input.
- If unsure, evaluate Y for (0,0), (0,1), (1,0), (1,1) and match the pattern to a gate.
Simplifying rules
Worked example
Practice this conceptself-check · 4 quick reps
The same idea in a real exam question:
Example 2 · Semiconductor Electronics · Logic Gates: Reducing a Network to One Gate
AB already implies A + B
A constant answer is allowed
XOR and XNOR are complements
Concept 3 of 3: Logic gates built from diodes, transistors and switches
Definition
- Diode OR: anodes at the inputs, cathodes joined, output across a resistor to earth. Any high input drives the output high.
- Diode AND: cathodes at the inputs, anodes joined and pulled up to the supply through a resistor. Any low input pulls the output low.
- Transistor NOT: a high input at the base turns the transistor on, and the collector output falls to about 0 V.
- A diode AND or OR followed by a transistor NOT gives NAND or NOR.
- Switches: in series with a lamp they make AND; in parallel they make OR. Switches that short the lamp when closed invert the result.
- None of the six bank questions on this concept is newer than 2023.
| Circuit | Output is high when | Gate |
|---|---|---|
| Two diodes with anodes at the inputs; output across a resistor to earth | either input is high | OR |
| Two diodes with cathodes at the inputs; output pulled up to the supply through a resistor | both inputs are high | AND |
| Transistor in common emitter; input at the base, output at the collector | the input is low | NOT |
| Diode AND feeding a transistor inverter | at least one input is low | NAND |
| Diode OR feeding a transistor inverter | both inputs are low | NOR |
| Two switches in series with a lamp | both switches are closed | AND |
| Two switches in parallel, together in series with a lamp | either switch is closed | OR |
| Two switches in parallel across the lamp, shorting it when closed | both switches are open | NOR |
| Two switches in series across the lamp, shorting it when both are closed | at least one switch is open | NAND |
Practice this conceptself-check · 4 quick reps
The same idea in a real exam question:
Example 3 · Semiconductor Electronics · Logic Gates: Reducing a Network to One Gate
The diodes' direction decides AND or OR
A transistor stage inverts
Switches across the lamp invert
Summary — formulas & gotchas at a glance
A revision cheat-sheet for the formulas and gotchas above. Click any concept name to jump back to its full explanation.
Formulas (2)
- NAND and NOR as universal gates
De Morgan's laws
- Reducing a gate network with Boolean algebra
Simplifying rules
Reference tables (1)
Logic gates built from diodes, transistors and switches9 rows
| Circuit | Output is high when | Gate |
|---|---|---|
| Two diodes with anodes at the inputs; output across a resistor to earth | either input is high | OR |
| Two diodes with cathodes at the inputs; output pulled up to the supply through a resistor | both inputs are high | AND |
| Transistor in common emitter; input at the base, output at the collector | the input is low | NOT |
| Diode AND feeding a transistor inverter | at least one input is low | NAND |
| Diode OR feeding a transistor inverter | both inputs are low | NOR |
| Two switches in series with a lamp | both switches are closed | AND |
| Two switches in parallel, together in series with a lamp | either switch is closed | OR |
| Two switches in parallel across the lamp, shorting it when closed | both switches are open | NOR |
| Two switches in series across the lamp, shorting it when both are closed | at least one switch is open | NAND |
Watch out for (9)
- A tied-input NAND is a NOT→ NAND and NOR as universal gates
- De Morgan flips the operation and every bar→ NAND and NOR as universal gates
- Look for bubbles on the inputs→ NAND and NOR as universal gates
- AB already implies A + B→ Reducing a gate network with Boolean algebra
- A constant answer is allowed→ Reducing a gate network with Boolean algebra
- XOR and XNOR are complements→ Reducing a gate network with Boolean algebra
- The diodes' direction decides AND or OR→ Logic gates built from diodes, transistors and switches
- A transistor stage inverts→ Logic gates built from diodes, transistors and switches
- Switches across the lamp invert→ Logic gates built from diodes, transistors and switches
Test yourself on Semiconductor Electronics
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