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JEE Mains Physics · Semiconductor Electronics

Logic Gates: Reducing a Network to One Gate

Write each gate's output in turn, from the inputs to Y, and simplify with De Morgan's laws until one basic gate, or a constant, is left.

Why this matters

Twenty-five PYQs, all but one multiple choice, and two from 2026. Nine are chains of NAND or NOR gates, often with tied inputs, that turn out to be a single AND, OR, NAND or NOR. Ten are mixed networks that need a line or two of Boolean algebra, and two of those reduce to a constant output. Six build gates from diodes, transistors or switches; none of those six is newer than 2023. Almost every question is a drawn circuit, so reading the symbols and the bubbles correctly is half the work.

Concept 1 of 3: NAND and NOR as universal gates

A NAND or NOR gate with its two inputs joined has only one input, and it simply inverts it. With that NOT in hand, De Morgan's laws turn NAND into OR and NOR into AND once the inputs are inverted. That is why either gate alone can build every other gate, and why so many questions are chains of them.

Definition

  • Notation: A⋅BA\cdot B is AND, A+BA + B is OR, A‾\overline{A} is NOT A.
  • AND is 1 only when every input is 1. OR is 0 only when every input is 0. NAND and NOR are AND and OR followed by NOT.
  • A small circle (bubble) on a gate's output inverts the output; a bubble on an input inverts that input.
  • Tied inputs: NAND(A,A)=A‾(A, A) = \overline{A} and NOR(A,A)=A‾(A, A) = \overline{A}, both NOT gates. AND or OR with tied inputs just passes A on.
  • De Morgan: A⋅B‾=A‾+B‾\overline{A\cdot B} = \overline{A} + \overline{B} and A+B‾=A‾⋅B‾\overline{A + B} = \overline{A}\cdot\overline{B}.
  • So a NAND fed with A‾\overline{A} and B‾\overline{B} is an OR gate, and a NOR fed with A‾\overline{A} and B‾\overline{B} is an AND gate. One more tied-input gate after either inverts it again.
  • Gate counts from NAND alone: NOT 1, AND 2, OR 3.

De Morgan's laws

A⋅B‾=A‾+B‾,A+B‾=A‾⋅B‾\overline{A\cdot B} = \overline{A} + \overline{B}, \qquad \overline{A + B} = \overline{A}\cdot\overline{B}

Worked example

Build an AND gate using only NAND gates. How many are needed?
Practice this conceptself-check · 4 quick reps

The same idea in a real exam question:

JEE Mains · 2022 · JEE Mains 2022 — 25 June · Q108Moderate

Example 1 · Semiconductor Electronics · Logic Gates: Reducing a Network to One Gate

Identify the logic operation performed by the given circuit:

A tied-input NAND is a NOT

A two-input gate drawn with its inputs joined has only one input. A NAND or NOR wired that way is an inverter, not a two-input gate, and missing this makes the whole chain come out wrong.

De Morgan flips the operation and every bar

Breaking a long bar changes AND into OR (or OR into AND) and puts a bar on each term. Changing only one of the two gives a wrong gate.

Look for bubbles on the inputs

A bubble where a wire enters a gate inverts that input before the gate acts. Reading such a gate as plain AND or OR gives the wrong expression from the first step.

Concept 2 of 3: Reducing a gate network with Boolean algebra

Any network of gates is just an expression in A and B. Write the output of each gate in turn, then simplify with a handful of rules. The answer is usually a single named gate; sometimes it is a constant that never changes. If the algebra stalls, a four-row truth table always settles it.

Definition

  • Write each gate's output as an expression, working from the inputs towards Y.
  • Basic rules: A+A=AA + A = A, A⋅A=AA\cdot A = A, A+A‾=1A + \overline{A} = 1, A⋅A‾=0A\cdot\overline{A} = 0, A+1=1A + 1 = 1, A⋅0=0A\cdot 0 = 0.
  • Absorption: A+A⋅B=AA + A\cdot B = A and A⋅(A+B)=AA\cdot(A + B) = A. If AB is 1 then A + B is 1 too, so (A+B)⋅AB=AB(A + B)\cdot AB = AB.
  • A+A‾⋅B=A+BA + \overline{A}\cdot B = A + B.
  • XOR: AB‾+A‾BA\overline{B} + \overline{A}B, which is 1 when the inputs differ. XNOR is its complement, 1 when they are equal.
  • A network can reduce to a constant: then Y is 0 (or 1) for every input.
  • If unsure, evaluate Y for (0,0), (0,1), (1,0), (1,1) and match the pattern to a gate.

Simplifying rules

A+AB=A,A(A+B)=A,A+A‾B=A+B,A⊕B=AB‾+A‾BA + AB = A, \quad A(A + B) = A, \quad A + \overline{A}B = A + B, \quad A \oplus B = A\overline{B} + \overline{A}B

Worked example

An AND gate and an OR gate both take inputs A and B. Their outputs feed a NOR gate, whose output is Y. Which single gate is the network equal to?
Practice this conceptself-check · 4 quick reps

The same idea in a real exam question:

JEE Mains · 2023 · 11 April 2023 · Q105Moderate

Example 2 · Semiconductor Electronics · Logic Gates: Reducing a Network to One Gate

The logic operations performed by the given digital circuit is equivalent to:

AB already implies A + B

Whenever AB is 1, A + B is 1 as well. So AB·(A + B) is just AB, and AB + (A + B) is just A + B. Missing this leaves an expression that looks like no gate at all.

A constant answer is allowed

Some networks combine a signal with its own inverse, as in A·Ā or A + Ā. The output is then 0 or 1 for every input, and an option such as 'Y = 0' is the right one.

XOR and XNOR are complements

XOR is 1 when the inputs differ; XNOR is 1 when they match. An extra inverter at the end swaps one for the other, so count the bubbles.

Concept 3 of 3: Logic gates built from diodes, transistors and switches

A gate can be built from parts you already know. A high voltage is logic 1 and 0 V is logic 0. Diodes decide whether any one input, or every input, can set the output. A transistor in common emitter turns a high input into a low output, so it is a NOT gate. Switches and a lamp work the same way, with a closed switch as 1 and a lit lamp as 1.

Definition

  • Diode OR: anodes at the inputs, cathodes joined, output across a resistor to earth. Any high input drives the output high.
  • Diode AND: cathodes at the inputs, anodes joined and pulled up to the supply through a resistor. Any low input pulls the output low.
  • Transistor NOT: a high input at the base turns the transistor on, and the collector output falls to about 0 V.
  • A diode AND or OR followed by a transistor NOT gives NAND or NOR.
  • Switches: in series with a lamp they make AND; in parallel they make OR. Switches that short the lamp when closed invert the result.
  • None of the six bank questions on this concept is newer than 2023.
CircuitOutput is high whenGate
Two diodes with anodes at the inputs; output across a resistor to eartheither input is highOR
Two diodes with cathodes at the inputs; output pulled up to the supply through a resistorboth inputs are highAND
Transistor in common emitter; input at the base, output at the collectorthe input is lowNOT
Diode AND feeding a transistor inverterat least one input is lowNAND
Diode OR feeding a transistor inverterboth inputs are lowNOR
Two switches in series with a lampboth switches are closedAND
Two switches in parallel, together in series with a lampeither switch is closedOR
Two switches in parallel across the lamp, shorting it when closedboth switches are openNOR
Two switches in series across the lamp, shorting it when both are closedat least one switch is openNAND
The diodes' direction separates AND from OR; a transistor or a shorting switch adds the NOT.
Practice this conceptself-check · 4 quick reps

The same idea in a real exam question:

JEE Mains · 2022 · 28 June 2022 · Q16Moderate

Example 3 · Semiconductor Electronics · Logic Gates: Reducing a Network to One Gate

In the following circuit, the correct relation between output (Y)(Y) and inputs AA and BB will be :

The diodes' direction decides AND or OR

Anodes at the inputs with the output pulled down make OR; cathodes at the inputs with the output pulled up make AND. Check which end of each diode faces the input before naming the gate.

A transistor stage inverts

Taking the output from the collector of a common-emitter transistor turns the diode gate before it into its inverse: AND becomes NAND, OR becomes NOR.

Switches across the lamp invert

Switches in line with a lamp light it when closed. Switches placed across the lamp short it out when closed, so the lamp is lit only when they are open: the gate is inverted.

Summary — formulas & gotchas at a glance

A revision cheat-sheet for the formulas and gotchas above. Click any concept name to jump back to its full explanation.

Formulas (2)

  • NAND and NOR as universal gates

    De Morgan's laws

    A⋅B‾=A‾+B‾,A+B‾=A‾⋅B‾\overline{A\cdot B} = \overline{A} + \overline{B}, \qquad \overline{A + B} = \overline{A}\cdot\overline{B}
  • Reducing a gate network with Boolean algebra

    Simplifying rules

    A+AB=A,A(A+B)=A,A+A‾B=A+B,A⊕B=AB‾+A‾BA + AB = A, \quad A(A + B) = A, \quad A + \overline{A}B = A + B, \quad A \oplus B = A\overline{B} + \overline{A}B

Reference tables (1)

Logic gates built from diodes, transistors and switches9 rows
CircuitOutput is high whenGate
Two diodes with anodes at the inputs; output across a resistor to eartheither input is highOR
Two diodes with cathodes at the inputs; output pulled up to the supply through a resistorboth inputs are highAND
Transistor in common emitter; input at the base, output at the collectorthe input is lowNOT
Diode AND feeding a transistor inverterat least one input is lowNAND
Diode OR feeding a transistor inverterboth inputs are lowNOR
Two switches in series with a lampboth switches are closedAND
Two switches in parallel, together in series with a lampeither switch is closedOR
Two switches in parallel across the lamp, shorting it when closedboth switches are openNOR
Two switches in series across the lamp, shorting it when both are closedat least one switch is openNAND
The diodes' direction separates AND from OR; a transistor or a shorting switch adds the NOT.

Watch out for (9)

Test yourself on Semiconductor Electronics

20 past JEE Mains questions from this chapter, timed at 48 minutes and marked the way the exam marks it. You see your score and every answer the moment you finish. Free to start.