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MHT-CET Physics · Semiconductor Devices

Logic Gates and Boolean Algebra

A logic gate turns 0s and 1s into a 0 or 1 by a fixed rule — AND, OR, NOT, and the inverted NAND and NOR; a circuit of gates is read by writing each gate's output in turn and simplifying with De Morgan's laws.

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Why this matters

36 PYQs, three HARD — the largest page in the chapter, and most questions are a circuit drawn in a figure. Three shapes: naming a gate from part of its truth table, finding which single gate a combination is equivalent to, and the output or Boolean expression of a circuit for given inputs.

Concept 1 of 3: The Basic Gates and Their Truth Tables

Learn two rows per gate and the rest follow. AND is 1 only when all inputs are 1; OR is 0 only when all are 0; NAND and NOR are those with the output flipped; XOR is 1 when the inputs differ — an odd number of 1s.

Definition

  • AND Y=A⋅BY = A\cdot B; OR Y=A+BY = A + B; NOT Y=A‾Y = \overline{A}.
  • NAND Y=A⋅B‾Y = \overline{A\cdot B}: 0 only for (1, 1). NOR Y=A+B‾Y = \overline{A + B}: 1 only for (0, 0).
  • XOR Y=AB‾+A‾BY = A\overline{B} + \overline{A}B: 1 when an odd number of inputs are 1.
  • NAND and NOR are UNIVERSAL: any gate can be built from either alone.
  • Output 1 for (0, 0) AND for (0, 1) or (1, 0): NAND. Output 1 for (1, 0) and (0, 1) from two different gates: NAND and OR both qualify.

NAND and NOR

NAND: Y=A⋅B‾,NOR: Y=A+B‾\text{NAND: } Y = \overline{A\cdot B}, \qquad \text{NOR: } Y = \overline{A + B}

Worked example

A two-input gate gives 1 only when both inputs are 0. Which gate?
Practice this conceptself-check · 3 quick reps

The same idea in a real exam question:

MHT-CET · 2025 · 26 April Shift II · Q26Easy

Example 1 · Semiconductor Devices · Logic Gates and Boolean Algebra

In a certain 2 -inputs logic gate, when inputs A=0A = 0 and B=0B = 0, then output C=1C = 1. And also when inputs =0, B=1= 0,\text{ }B = 1, then again output C=1C = 1. The gate must be

Reading one row and stopping

(0, 0) → 1 fits NAND, NOR and XNOR alike. Check a second row before choosing: (0, 1) → 1 rules out NOR.
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Concept 2 of 3: Which Single Gate Is a Combination Equal To?

A NAND or NOR with its inputs tied together is just a NOT. Put NOTs on both inputs of a NAND and De Morgan turns it into an OR; on a NOR, into an AND. Most 'equivalent gate' circuits reduce in two or three such steps — write the expression and simplify.

Definition

  • NAND or NOR with inputs joined: NOT.
  • A‾⋅B‾‾=A+B\overline{\overline{A}\cdot\overline{B}} = A + B (NAND of NOTs is OR); A‾+B‾‾=A⋅B\overline{\overline{A} + \overline{B}} = A\cdot B (NOR of NOTs is AND).
  • OR then NOT is NOR; NOR then NOT is OR; NAND then NOT is AND.
  • (A+B)⋅A⋅B‾=A⊕B(A + B)\cdot\overline{A\cdot B} = A \oplus B: an OR and a NAND into an AND make XOR.
  • De Morgan: A⋅B‾=A‾+B‾\overline{A\cdot B} = \overline{A} + \overline{B}, A+B‾=A‾⋅B‾\overline{A + B} = \overline{A}\cdot\overline{B}.

De Morgan's laws

A⋅B‾=A‾+B‾,A+B‾=A‾⋅B‾\overline{A\cdot B} = \overline{A} + \overline{B}, \qquad \overline{A + B} = \overline{A}\cdot\overline{B}

Worked example

The output of an OR gate is fed to both inputs of a NAND gate. The combination behaves as?
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The same idea in a real exam question:

MHT-CET · 2025 · 20 April Shift II · Q20Moderate

Example 2 · Semiconductor Devices · Logic Gates and Boolean Algebra

The resultant logic gate from the combination of following gates is

Missing the bubble

A small circle on a gate's output (or input) is a NOT. Reading a NAND as an AND flips every answer that follows; check each gate's output for a bubble before writing its expression.
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Concept 3 of 3: Output and Boolean Expression of a Circuit

Label the output of every gate, left to right, as an expression of the inputs. The last label is Y. For given inputs, you can instead carry actual 0s and 1s through the gates — slower to write, but it cannot go wrong on a sign.

Definition

  • Work gate by gate from the inputs to Y; write each intermediate output.
  • For 'which inputs give Y = 1', find the one or two rows that make the last gate 1 and work backwards.
  • Given four truth tables to choose from, compute only the rows where the candidates differ.
  • A+A‾B=A+BA + \overline{A}B = A + B; A⋅(A+B)=AA\cdot(A + B) = A; A⋅B‾+A‾B=A⋅B‾\overline{A\cdot B} + \overline{A}B = \overline{A\cdot B}.

Absorption

A+A‾B=A+B,A(A+B)=AA + \overline{A}B = A + B, \qquad A(A + B) = A

Worked example

Y=(A+B)⋅CY = (A + B)\cdot C. Output for A = 1, B = 0, C = 1, and for A = 1, B = 1, C = 0?
Practice this conceptself-check · 2 quick reps

The same idea in a real exam question:

MHT-CET · 2025 · 25 April Shift II · Q6Moderate

Example 3 · Semiconductor Devices · Logic Gates and Boolean Algebra

One of the following values of inputs A,BA,B and C respectively gives output (Y) of the following combination of logic gates as ' 1 ' is

Trusting the pattern, not the gates

Circuits that LOOK alike on paper can differ by one bubble, and a NAND–NAND pair gives a different answer from an AND–NAND pair. Carry the 0s and 1s through every gate yourself rather than matching the picture to one seen before.
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Summary — formulas & gotchas at a glance

A revision cheat-sheet for the formulas and gotchas above. Click any concept name to jump back to its full explanation.

Formulas (3)

Watch out for (3)

Test yourself on Semiconductor Devices

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